Product Summary

The EPF10K10QC208-4N is a PLD. The EPF10K10QC208-4N contains an embedded array and a logic array. The embedded array of the EPF10K10QC208-4N is used to implement a variety of memory functions or complex logic functions, such as digital signal processing (DSP), microcontroller, wide-data-path manipulation, and data-transformation functions. The logic array performs the same function as the sea-of-gates in the gate array. The EPF10K10QC208-4N is used to implement general logic, such as counters, adders, state machines, and multiplexers. The combination of embedded and logic arrays provides the high performance and high density of embedded gate arrays, enabling designers to implement an entire system on a single device.

Parametrics

EPF10K10QC208-4N absolute maximum ratings: (1)VCC, Supply voltage With respect to ground: –2.0 to 7.0 V; (2)VI, DC input voltage: –2.0 to 7.0 V; (3)IOUT, DC output current, per pin: –25 to 25 mA; (4)TSTG, Storage temperature No bias: –65 to 150℃; (5)TAMB, Ambient temperature Under bias: –65 to 135℃; (6)TJ, Junction temperature Ceramic packages, under bias: 150℃.

Features

EPF10K10QC208-4N features: (1)Multi Volt TM I/O interface support; (2)5.0V tolerant input pins in FLEX 10KA devices; (3)Low power consumption (typical specification less than 0.5 mA in standby mode for most devices); (4)FLEX 10K and FLEX 10KA devices support peripheral component interconnect Special Interest Group (PCI SIG) PCI Local Bus Specification, Revision 2.2; (5)FLEX 10KA devices include pull-up clamping diode, selectable on a pin-by-pin basis for 3.3-V PCI compliance; (6)Select FLEX 10KA devices support 5.0-V PCI buses with eight or fewer loads; (7)Built-in Joint Test Action Group (JTAG) boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990, available without consuming any device logic.

Diagrams

EPF10K10QC208-4N block diagram

Image Part No Mfg Description Data Sheet Download Pricing
(USD)
Quantity
EPF10K10QC208-4N
EPF10K10QC208-4N


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Data Sheet

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(USD)
Quantity
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